RTOS for Raisonance RCSTM8

Atomthreads now contains support for Raisonance’s STM8 compilerĀ RCSTM8. We now support all three available STM8 compilers (Cosmic, IAR and Raisonance) so you can choose to use Atomthreads for a project safe in the knowledge that switching compilers will be pain-free.

The STM8 port contains largely common code with only a small number of conditionally-compiled sections to handle the differences between the compilers. For example functions are specified as interrupt handlers differently between the three compilers:


@interrupt void CosmicISR(void) { ... }
#pragma vector = 13
__interrupt void IarISR(void) { ... }


void RaisonanceISR(void) interrupt 11 { ... }

The compilers also have different intrinsic functions, which are used by the port to enable/disable interrupts. These intrinsics are generally used in place of inline assembler within the C code, and the majority of the assembler code (for example the context switch routine) is farmed out to a separate assembler file. Due to more considerable differences in assembler syntax between the compiler toolchains a separate assembler file has been written for each.

Like the other STM8 compilers, Raisonance make use of a set of virtual registers in fast page0 memory to augment the limited number of CPU registers available on this architecture. There are four single-byte registers known as BH, BL, CH, CL and these are all taken into account by the RTOS context switch scheme. The register usage conventions of both Raisonance and Cosmic mean that these virtual registers are generally saved by the compiler before the context switch routine is called, so the context switch routines for those two compilers are almost identical. The IAR compiler’s convention of setting 8 virtual registers aside which should not be modified by called functions mean that the IAR context switch is somewhat different.

The core architecture-independent kernel code which generally does not need any modification when porting to new compilers did require a small change for the Raisonance compiler: they have seen fit to use “data” as a reserved word which cannot be used as a function parameter name. Other than renaming some function parameters to handle this unusual case, no other core portable kernel code required modification. Including the AVR GCC port, the Atomthreads kernel has now been proven to build successfully using compilers from four different vendors.

More details on the new Raisonance port are available here. The port contains a Makefile to build the full automated test suite, as well as a sample application project for the ST Visual Develop (STVD) IDE. Full instructions are also provided within the source.

Until this is rolled into an official release you can download the latest development snapshot fromĀ Github.

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